Table of Contents

1.1 Electronics and digital systems
1.2 Gates
1.3 Boolean algebra and equations
1.4 Digital circuit simulator
1.5 Timing diagrams
1.6 Equations to/from circuits
1.7 Basic circuit drawing conventions
1.8 Basic properties of Boolean algebra
1.9 Sum-of-products form
1.10 Sum-of-minterms form
1.11 Binary and counting
1.12 Truth tables
1.13 Product-of-sums form and maxterms
1.14 Top-down design + examples
1.15 Why study digital design
1.16 Multiple outputs

2.1 Two-level combinational logic simplification
2.2 K-maps: Introduction
2.3 3- and 4-variable K-maps
2.4 K-map examples
2.5 DeMorgan’s Law
2.6 XOR / XNOR gates
2.7 NAND / NOR (universal gates)
2.8 Muxes
2.9 Example: Multiplexed automobile above-mirror display
2.10 Decoders
2.11 Encoders
2.12 Don’t cares
2.13 Prime implicants and minimal covers
2.14 Quine-McCluskey

3.1 SR latches
3.2 Clocks, D flip-flops, and registers
3.3 Example: Flight attendant call button using a D flip-flop
3.4 FSMs
3.5 FSM simulator
3.6 Capturing behavior with FSMs
3.7 Example: Flight-attendant call button using an FSM
3.8 FSM examples
3.9 FSMs to circuits (design)
3.10 Example: Laser surgery system using an FSM
3.11 Example: Secure car key
3.12 Reducing states
3.13 State encodings
3.14 Mealy FSMs
3.15 FSM issues
3.16 Controller clock frequency
3.17 Circuits to FSMs (analysis)
3.18 Non-ideal flip-flop behavior
3.19 Product Profile: Pacemaker

4.1 Adders
4.2 Signed numbers in binary
4.3 Subtractors
4.4 Comparators
4.5 Example: Color space converter: RGB to CMYK
4.6 N-bit muxes
4.7 Load registers
4.8 Example: Above-mirror display using parallel-load registers
4.9 Shifters
4.10 Strength reduction
4.11 Example: Above-mirror display using shift registers
4.12 Counters and timers
4.13 Example: Laser surgery system using a timer
4.14 Multipliers (array-style)
4.15 Product Profile: Ultrasound

5.1 HLSMs: Introduction
5.2 HLSMs with variables
5.3 HLSMs with a loop
5.4 HLSM simulator
5.5 Capturing behavior with HLSMs
5.6 Datapaths for HLSMs
5.7 Example: Soda dispenser
5.8 HLSMs to circuits: RTL design
5.9 Example: Laser-based distance measurer
5.10 RTL timing
5.11 Assigning and reading variables
5.12 Product Profile: Digital video
5.13 Behavioral-level design: Programs to gates

6.1 Tradeoffs
6.2 Carry-lookahead adders
6.3 Register files
6.4 Example: Above-mirror display using a register file
6.5 Multi-function registers
6.6 ALUs
6.7 SRAM and DRAM
6.8 RAM design
6.9 ROM design
6.10 Queues (FIFOs)
6.11 Chip economics
6.12 Composing memory
6.13 Product Profile: Cell phone

7.1 Introduction to HDLs (Verilog)
7.2 Combinational logic (Verilog)
7.3 Identifiers (Verilog)
7.4 Testbench (Verilog)
7.5 Sequential logic (Verilog)
7.6 Datapath components: Structural (Verilog)
7.7 RTL design (Verilog)
7.8 Datapath components: Behavioral (Verilog)
7.9 Example: Laser-based distance measurer (Verilog)

8.1 Introduction to HDLs (VHDL)
8.2 Combinational logic (VHDL)
8.3 Identifiers (VHDL)
8.4 Testbench (VHDL)
8.5 Sequential logic (VHDL)
8.6 Datapath components: Structural (VHDL)
8.7 RTL design (VHDL)
8.8 Datapath components: Behavioral (VHDL)
8.9 Example: Laser-based distance measurer (VHDL)

9.1 ASCII and Unicode
9.2 Unsigned binary numbers
9.3 Signed binary numbers: Two’s complement
9.4 Binary, hexadecimal, and octal
9.5 General number bases
9.6 Floating-point numbers
9.7 Floating-point arithmetic
9.8 Arrays
9.9 Records
9.10 Graphics
9.11 Image and video data
9.12 Audio
9.13 Naming numerous bits

10.1 Gray code
10.2 JK and T latches and flip-flops

What You’ll Find In This zyBook:

More action with less text.

  • Hundreds of participation activities: Questions, animations, tools
  • Exceptionally hands-on learning: Browser-based tools include algebraic solver, circuit simulator, K-map minimizer, state machine capture, high level state-machine capture, and more
  • Seamlessly integrated auto-generated and auto-graded challenge activities
  • Coverage emphasizes modern relevant approach, reaches RTL design in just 5 chapters
  • Ideal for traditional “what’s under the hood” goal, and for introduction to embedded systems

Instructors: Interested in evaluating this zyBook for your class? Sign up for a Free Trial and check out the first chapter of any zyBook today!

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The zyBooks Approach

Less text doesn’t mean less learning.

An exceptionally hands-on approach to presenting digital design by combining theory and practice, including various web-based simulators, like a circuit simulator, finite-state machine simulator, high-level state machine simulator, datapath simulator, and more, plus numerous tools, like a Boolean algebra tool, a K-map minimizer tool, etc. The material emphasizes a top-down behavior-to-circuits approach, for combinational, sequential, and high-level (register-transfer-level) design. Emphasis is placed on RTL design, where most modern digital design occurs. This material’s HDL (Verilog and VHDL) coverage is intentionally template focused, teaching just enough of the HDLs to understand the templates.

“The most striking aspect of ZyBooks for me as an instructor has been the ability to introduce a topic and then point my students to specific exercises/activities in ZyBooks that would not only expound on the concept but allow them to practice them with confidence.”

Authors

Frank Vahid
Professor of Computer Science and Engineering, Univ. of California, Riverside

Roman Lysecky
Professor of Electrical and Computer Engineering, Univ. of Arizona