Table of Contents

1. Information as Bits

1.1 ASCII and Unicode
1.2 Unsigned binary numbers
1.3 Signed binary numbers: Two’s complement
1.4 Binary, hexadecimal, and octal
1.5 General number bases
1.6 Floating-point numbers
1.7 Floating-point arithmetic
1.8 Arrays
1.9 Records
1.10 Graphics
1.11 Image and video data
1.12 Audio
1.13 Naming numerous bits

2. MIPS Assembly, Part 1

2.1 Programmable processor concept
2.2 lw, sw: Load and store instructions
2.3 Memory alignment and endianness
2.4 addi, add: Add instructions
2.6 A small assembly program
2.7 sub, mul: Subtraction and multiplication instructions
2.8 beq, bne, j: Branch and jump instructions
2.9 slt: Set on less than instruction
2.10 Input / output

3. MIPS Assembly, Part 2

3.1 jal, jr: Subroutine instructions
3.2 Assembly program example: Subroutines
3.3 Load and store with offsets
3.4 Subroutines and the program stack
3.5 Machine instructions
3.6 Jump/branch immediates
3.7 Assemblers
3.8 Flowcharts and assembly programming
3.9 MIPSzy instruction summary

4. C to Assembly

4.1 Assignments
4.2 Expressions
4.3 Conserving registers
4.4 If-else
4.5 If-else expressions
4.6 Loops
4.7 Functions
4.8 Arrays and strings
4.9 Compilers

5. MIPSzy Processor Design

5.1 Review: Combinational circuits
5.2 Review: Decoders, muxes, and adders
5.3 Review: Timing diagrams
5.4 Review: Registers
5.5 Review: Register files
5.6 Base MIPSzy (lw, sw, addi, add): Behavior
5.7 Base MIPSzy: Processor design
5.8 Base MIPSzy + sub
5.9 Base MIPSzy + j / jal
5.10 Base MIPSzy + beq/bne
5.11 Base MIPSzy + slt
5.12 Base MIPSzy : Verilog

6. Memory

6.1 SRAM and DRAM
6.2 Chip economics
6.3 Composing memory
6.4 Cache basics: Part 1
6.5 Cache basics: Part 2
6.6 Set-associative cache
6.7 Memory hierarchy
6.8 Review: nMOS transistors
6.9 RAM design
6.10 ROM design
6.11 Virtual memory
6.12 Error detection
6.13 Data compression

7. Input/Output

7.1 Memory-mapped I/O
7.2 Interrupts
7.3 Polled and vectored interrupts
7.4 Handshaking
7.5 Buses
7.6 Arbitration
7.7 Direct memory access (DMA)
7.8 Serial communication

8. Appendix

8.1 MIPSzy C simulator

What You’ll Find In This zyBook:

More action with less text.

  • An approachable introduction to computer organization
  • Introduces assembly programming on a simple yet practical MIPS subset (MIPSzy)
  • Shows how to design the MIPSzy processor using single-cycle execution
  • Seamlessly integrated simulator and auto-generated, auto-graded homework

Instructors: Interested in evaluating this zyBook for your class? Sign up for a Free Trial and check out the first chapter of any zyBook today!

The zyBooks Approach

Less text doesn’t mean less learning.

Describes storing information as bits; introduces assembly programming on a simple yet practical MIPS subset called MIPSzy (12 instructions); shows how to translate C constructs to MIPSzy assembly; reviews digital design and designs a single-cycle MIPSzy processor; introduces memory concepts like RAM/ROM, cache, and memory hierarchy; teaches input/output concepts like memory-mapped I/O, interrupts, and arbitration. Includes a built-in MIPSzy (and MIPS) simulator, plus over 100 seamlessly-integrated auto-generated auto-graded homework exercises.


Frank Vahid
Professor of Computer Science and Engineering, Univ. of California, Riverside

Roman Lysecky
Professor of Electrical and Computer Engineering, Univ. of Arizona

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